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[VHDL-FPGA-Verilog] uart(VHDL)

Description: UART的VHDL实现，非常经典，希望对大家有用-UART of the VHDL implementation
Platform: | Size: 18432 | Author: djyi | Hits:

[VHDL-FPGA-Verilog] UART

Description: 實作UART 介面 4 byte 傳送 或 4 byte 接收 開發環鏡 quartus 且 附模擬檔-4 byte real interfaces for UART transmission or 4 byte receive loop mirror quartus and the development of simulation files attached
Platform: | Size: 1055744 | Author: 許大頭 | Hits:

[VHDL-FPGA-Verilog] uart

Description: uart - universal asynchronous receicer and transmitter source code using VHDL
Platform: | Size: 1930240 | Author: nagarjuna reddy | Hits:

[VHDL-FPGA-Verilog] pgm

Description: uart vhdl code contains all the neceesary things for a uart of speed 2 mbps and has a fifo of 64 KB
Platform: | Size: 205824 | Author: libin | Hits:

[VHDL-FPGA-Verilog] uart

Description: RS232控制分频,实现占空比和频率可以控制的分频器-verilog RS232
Platform: | Size: 79872 | Author: cuiqiang | Hits:

[VHDL-FPGA-Verilog] uart_read_send

Description: uart自收发的vhdl实现,包括quartus工程文件及modelsim仿真工程文件(调试通过)-uart vhdl from the transceiver to achieve, including the quartus project file and modelsim simulation project file (debugged)
Platform: | Size: 417792 | Author: binbin | Hits:

[Com Port] RS232

Description: simple example for uart on fpga
Platform: | Size: 714752 | Author: Jay | Hits:

[VHDL-FPGA-Verilog] UART_vhdl

Description: 非常经典的VHDL编写的UART软件核，支持8位/16位通信-UART S-Communication
Platform: | Size: 405504 | Author: 张立洁 | Hits:

[VHDL-FPGA-Verilog] FT2232H_USB_Core

Description: 在FPGA外扩用FT2232 实现UART TO USB 2.0 的通信。-The FT2232H is a USB2.0 Hi-Speed USB Device to FIFO IC. This core allows the use of this chip with an FGPA design in high speed FT245 style synchronous FIFO mode. Data rates up to 25 mbytes/s can be achieved. The core has internal FIFOs on the receive and transmit for improved throughput. For more information see FTDI s appnote "AN_130_FT2232H_Used_In_FT245 Synchronous FIFO Mode.pdf" Included: VHDL core, NIOS test application, PC test application
Platform: | Size: 6144 | Author: 李涛 | Hits:

[VHDL-FPGA-Verilog] UART

Description: 用UART实现RS422通信-UART TO RS422
Platform: | Size: 1024 | Author: MARS | Hits:

[VHDL-FPGA-Verilog] gh_uart_16550_072108

Description: UART（通用串行收发器）的VHDL源代码，适合硬件工程师在FPGA内部实现多个UART-UART (universal serial transceivers), VHDL source code for hardware engineers in the FPGA to achieve multiple internal UART
Platform: | Size: 16384 | Author: 彭涛 | Hits:

[VHDL-FPGA-Verilog] UART

Description: VHDL语言写的串口发送、接收程序，根据晶振和相应的波特率修改分频器就可以实现！-Written in VHDL serial send, receive, process, according to crystal and the corresponding baud rate divider changes can be achieved!
Platform: | Size: 2048 | Author: 康丙寅 | Hits:

[VHDL-FPGA-Verilog] uart

Description: 采用VHDL语言编写的串口驱动程序，已调试通过，能够实现同PC机的数据传输，可读性好，可移植性好-VHDL language using the serial driver has been debugged, to achieve the same PC, the data transmission, readable and portable
Platform: | Size: 526336 | Author: 王玉强 | Hits:

[VHDL-FPGA-Verilog] ASIC_VHDL_FPGA_design_lectureNotes

Description: 这是美国普渡大学（Purdue University West Lafayette)ASIC design 的课件完整版！带事例和讲解的非常好的VHDL学习材料！含有vhdl 基础知识，设计步骤，UART, RTL,Test Bench 以及测试和调试，DEBUG等各种VHDL设计者必学知识！-This is Purdue University (USA) ECE 337 ASIC design class lecture notes! very classic! The content include basics of vhdl, design process, UART design, RTL design, test and debug etc,etc VERY helpful to VHDL learners. A MUST SEE !
Platform: | Size: 10332160 | Author: zhou | Hits:

[VHDL-FPGA-Verilog] UART

Description: 语言：verilog语言 功能：通过串口控制模块，实现FPGA与串口 通信。 仿真环境：modelsim 综合环境：quartus -Language: verilog language function: through the serial port control module, FPGA and serial communication. Simulation Environment: modelsim integrated environment: quartus II
Platform: | Size: 64512 | Author: huangjiaju | Hits:

[VHDL-FPGA-Verilog] Micro_uart

Description: Micro-uart source code
Platform: | Size: 1465344 | Author: Huang | Hits:

[VHDL-FPGA-Verilog] UART

Description: FPGA的UART程序，非常好的，讲解详细，我当初看了好多都看不懂，看了这个以后终于明白-FPGA' s UART program, very good, detailed explanation, I had read a lot have not read, finally realized after reading this
Platform: | Size: 276480 | Author: xuxing | Hits:

[VHDL-FPGA-Verilog] FPGA_UART

Description: 其中讲到的是经典的VHDL的UART设计实例，而且有很详细的解释和分析，适合针对FPGA串口的开发。-Which is referred to the UART VHDL design of the classic examples, and there are detailed explanation and analysis for the serial port for FPGA development.
Platform: | Size: 6031360 | Author: 林雨 | Hits:

[VHDL-FPGA-Verilog] uart

Description: FPGA基于串口指令的多电机闭环调速系统-FPGA based multi-port instruction Motor Closed Loop System
Platform: | Size: 2141184 | Author: ace | Hits:

[VHDL-FPGA-Verilog] FPGA-UART

Description: 该资料是实现VHDL的串口通信(UART)，RS232接口协议，-VHDL implementation of serial communication
Platform: | Size: 2087936 | Author: lp | Hits:
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